The GlobalFoundries vs TSMC IP War: What Patent Attorneys Need to Know About Foundry Patent Strategy

The Semiconductor Foundry Patent War Nobody Talks About

When analysts discuss the global semiconductor industry, the conversation usually centres on chips — which foundry can manufacture 3nm, who has the best GAAFET implementation, how TSMC maintains its process technology lead. What receives far less attention is the parallel war being fought in the patent offices of the USPTO, EPO, and IP5 offices — a war for foundry-level IP that will determine licensing economics and competitive dynamics for the next decade.

The GlobalFoundries vs TSMC dispute — which exploded publicly with a December 2019 trade complaint and 16 simultaneous patent lawsuits filed across the US, Germany, and Singapore — is the most commercially significant semiconductor patent dispute since the DRAM memory wars of the 1990s. Understanding it requires understanding the economics of foundry competition and the specific technology areas at stake.

Background: GlobalFoundries' Strategic Pivot

GlobalFoundries was formed in 2009 when AMD spun out its manufacturing operations, combining them with Chartered Semiconductor Manufacturing of Singapore. For years, GF competed with TSMC and Samsung on process node leadership — attempting to deliver 7nm technology before ultimately announcing in 2018 that it was abandoning the 7nm process development programme. This was a pivotal strategic decision. Rather than continue bleeding capital in the foundry-leading-edge arms race, GF would focus on "differentiated foundry" — specialised processes for automotive, aerospace, RF, and embedded memory applications.

But abandoning 7nm left GF with a substantial investment in process technology IP that would not yield returns from internal manufacturing at leading-edge nodes. The logical alternative: licensing and enforcement. GF had accumulated a portfolio of over 9,000 patents during its years as a leading-edge foundry competitor — patents covering FinFET manufacturing processes, deposition and etch integration schemes, and advanced lithography integration that TSMC, Samsung, and their customers were now using.

The 2019 Legal Offensive — 16 Simultaneous Patent Actions

GF's December 2019 patent offensive targeted not just TSMC but TSMC's most important customers: Apple, Broadcom, MediaTek, Nvidia, NXP Semiconductors, Qualcomm, and STMicroelectronics. The complaint was filed simultaneously across three jurisdictions: the US International Trade Commission (ITC) seeking import bans on chips manufactured by TSMC, US district courts, and German regional courts.

The specific patents asserted covered several critical manufacturing technology areas relevant to TSMC's 16nm/12nm FinFET processes and, by extension, the chips designed and manufactured using those processes. The legal strategy was deliberately designed to maximise leverage — by targeting TSMC's customers directly at the ITC (which can issue exclusion orders blocking imports of infringing articles), GF created incentives for the customers to pressure TSMC toward settlement rather than wait out years of litigation.

The Technology at Stake — FinFET Manufacturing Process IP

To understand why these patents matter technically, consider what FinFET manufacturing requires that planar CMOS did not. FinFET transistor formation involves: epitaxial silicon fin growth or etch patterning, fin isolation using shallow trench isolation (STI) fill and recess, replacement metal gate (RMG) processing with high-k dielectric deposition, self-aligned contact formation between gate and source/drain, and middle-of-line (MOL) via-to-gate and via-to-contact formation — each step with nanometer-scale precision requirements.

GF's assertions covered specific process integration sequences — particular combinations of process steps that, while each individually known, combine in ways that GF argued it had pioneered and patented. The legal question: under KSR v. Teleflex, is a combination of known process steps obvious? The technical question: did GF actually develop those specific combinations first, and can they prove it through conception and reduction to practice documentation?

Settlement and Its Lessons for Foundry IP Strategy

TSMC and GlobalFoundries settled all disputes in October 2022 — the terms were not publicly disclosed, but the settlement was announced as a "mutual agreement" with ongoing cross-licensing provisions. Reading between the lines of foundry economics, the settlement almost certainly involved: (1) TSMC licensing GF's FinFET process patents for historical use at 16nm/12nm nodes; (2) GF licensing TSMC's advanced process technology for certain manufacturing applications; and (3) both parties establishing a framework for future cross-licensing as technology evolves.

What Patent Attorneys Need to Know

For IP counsel advising semiconductor industry clients — fabless chip designers, EDA software companies, foundry customers, or equipment suppliers — the GF/TSMC dispute illustrates several critical strategic lessons:

• Foundry customers bear patent risk — When a patent holder targets foundry customers at the ITC rather than the foundry itself, the chip designer faces import bans on its products. FTO analysis for fabless semiconductor companies must consider foundry-level process patents, not just design-level semiconductor patents.
• Patent portfolio buildup during R&D investment is strategic insurance — GF's ability to monetise its IP came from systematically filing patents during the years of active process development. Companies that invest in R&D without parallel systematic IP capture lose future monetisation and defensive positioning simultaneously.
• Cross-licensing is the endgame in semiconductor — Very few semiconductor patent disputes end with injunctions. The economics of interdependency — where even competitors rely on each other's manufacturing processes at some level — favour cross-licensing resolutions. This means invalidity of opponent patents is a key lever in licensing negotiations, not just litigation.

"In semiconductor, the patent portfolio is the balance sheet asset that technology investment creates alongside the manufacturing capability. Companies that treat patent filing as an afterthought to R&D lose twice — once when the technology is commercialised by someone else, and again when they face licensing demands they cannot respond to in kind."